[問題] 關於LM4F通訊問題

看板ASM (組合語言)作者 (我要快樂)時間11年前 (2013/12/10 20:35), 編輯推噓2(203)
留言5則, 3人參與, 最新討論串1/2 (看更多)
目前用LM4F的MCU寫 五個不同儀器的資料可以由五個UART(UART1、UART2、UART3、UART4 、UART5)的Rx接收 後送給UART0的Rx收然後傳給電腦人機(BCB5) UART0的部分是使用udma寫的 以下是我擷取的一部分晶片程式碼 // The number of SysTick ticks per second used for the SysTick interrupt. //***************************************************************************** #define SYSTICKS_PER_SECOND 100 //***************************************************************************** // The size of the UART transmit and receive buffers. They do not need to be // the same size. //***************************************************************************** #define UART_TXBUF_SIZE 16 #define UART_RXBUF_SIZE 16 //***************************************************************************** // The transmit and receive buffers used for the UART transfers. There is one // transmit buffer and a pair of recieve ping-pong buffers. //***************************************************************************** //static unsigned char g_ucTxBuf[UART_TXBUF_SIZE]; static unsigned char g_ucRxBuf1[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf2[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf3[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf4[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf5[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf6[UART_RXBUF_SIZE]; static unsigned char g_ucRxBuf7[UART_RXBUF_SIZE]; //static unsigned char k=0; unsigned char uartTmpBuff[UART_RXBUF_SIZE+4+4]; void UART1IntHandler(void) //此中斷是做收資料與傳資料 { unsigned long ulStatus; char header[]="###B"; //辨識符號 char tail[]="B%%%"; //get interrupt status ulStatus = ROM_UARTIntStatus(UART1_BASE, true); //clear the asserted interrupts ROM_UARTIntClear(UART1_BASE, ulStatus); //FIFO data transfer if(ulStatus == UART_INT_RX)//接收中斷標幟 { while(ROM_UARTCharsAvail(UART1_BASE)) //loop while there are chars { g_ucRxBuf1[g_ulRxBuf1Count++] = ROM_UARTCharGetNonBlocking(UART1_BASE); if(g_ulRxBuf1Count >= UART_RXBUF_SIZE) { g_ulRxBuf1Count = 0; /*ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART0TX | UDMA_PRI_SELECT, UDMA_MODE_BASIC, header, (void *)(UART0_BASE + UART_O_DR), 3); ROM_uDMAChannelEnable(UDMA_CHANNEL_UART0TX);*/ memcpy(uartTmpBuff,header,sizeof(header)); memcpy(uartTmpBuff+sizeof(header)-1,g_ucRxBuf1,sizeof(g_ucRxBuf1)); memcpy(uartTmpBuff+sizeof(header)+sizeof(g_ucRxBuf1)-1,tail,sizeof(tail)); //通道傳輸設置 ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART0TX | UDMA_PRI_SELECT, UDMA_MODE_BASIC, uartTmpBuff, (void *)(UART0_BASE + UART_O_DR), sizeof(uartTmpBuff)); ROM_uDMAChannelEnable(UDMA_CHANNEL_UART0TX); } } } } void UART2IntHandler(void) //此中斷是做收資料與傳資料 { unsigned long ulStatus; char header[]="###C"; char tail[]="C%%%"; //get interrupt status ulStatus = ROM_UARTIntStatus(UART2_BASE, true); //clear the asserted interrupts ROM_UARTIntClear(UART2_BASE, ulStatus); //FIFO data transfer if(ulStatus == UART_INT_RX) { while(ROM_UARTCharsAvail(UART2_BASE)) //loop while there are chars { g_ucRxBuf2[g_ulRxBuf2Count++]= ROM_UARTCharGetNonBlocking(UART2_BASE); if(g_ulRxBuf2Count >= UART_RXBUF_SIZE) { g_ulRxBuf2Count = 0; memcpy(uartTmpBuff,header,sizeof(header)); memcpy(uartTmpBuff+sizeof(header)-1,g_ucRxBuf2,sizeof(g_ucRxBuf2)); memcpy(uartTmpBuff+sizeof(header)+sizeof(g_ucRxBuf2)-1,tail,sizeof(tail)); ROM_uDMAChannelTransferSet(UDMA_CHANNEL_UART0TX | UDMA_PRI_SELECT, UDMA_MODE_BASIC, uartTmpBuff, (void *)(UART0_BASE + UART_O_DR), sizeof(uartTmpBuff)); ROM_uDMAChannelEnable(UDMA_CHANNEL_UART0TX); } } } } void InitUART0(void) { // Enable the UART peripheral, and configure it to operate even if the CPU // is in sleep. ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0); ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART0); ROM_GPIOPinConfigure(GPIO_PA0_U0RX); ROM_GPIOPinConfigure(GPIO_PA1_U0TX); ROM_GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1); // Configure the UART communication parameters. ROM_UARTConfigSetExpClk(UART0_BASE, ROM_SysCtlClockGet(), 115200, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); // Set both the TX and RX trigger thresholds to 4. This will be used by // the uDMA controller to signal when more data should be transferred. The // uDMA TX and RX channels will be configured so that it can transfer 4 // bytes in a burst when the UART is ready to transfer more data. ROM_UARTFIFOLevelSet(UART0_BASE, UART_FIFO_TX4_8, UART_FIFO_RX4_8); // Enable the UART for operation, and enable the uDMA interface for RX // channels. ROM_UARTEnable(UART0_BASE); ROM_UARTDMAEnable(UART0_BASE, UART_DMA_TX); // Put the attributes in a known state for the uDMA UART0TX channel. These // should already be disabled by default. // uDMA通道屬性清除 ROM_uDMAChannelAttributeDisable(UDMA_CHANNEL_UART0TX, //選擇UART0 TX的 DMA通道 UDMA_ATTR_ALTSELECT | //設置為主控制結 構 UDMA_ATTR_HIGH_PRIORITY | //普通優先級 UDMA_ATTR_REQMASK); //響應外設請求 // Set the USEBURST attribute for the uDMA UART TX channel. This will // force the controller to always use a burst when transferring data from // the TX buffer to the UART. This is somewhat more effecient bus usage // than the default which allows single or burst transfers. //uDMA通道屬性始能 ROM_uDMAChannelAttributeEnable(UDMA_CHANNEL_UART0TX, UDMA_ATTR_USEBURST); //選擇UART0 TX的DMA通道;設置觸發方式只有脈衝觸發有效 // Configure the control parameters for the UART TX. The uDMA UART TX // channel is used to transfer a block of data from a buffer to the UART. // The data size is 8 bits. The source address increment is 8-bit bytes // since the data is coming from a buffer. The destination increment is // none since the data is to be written to the UART data register. The // arbitration size is set to 4, which matches the UART TX FIFO trigger // threshold. //uDMA通道控制設置 ROM_uDMAChannelControlSet(UDMA_CHANNEL_UART0TX | UDMA_PRI_SELECT, UDMA_SIZE_8 | UDMA_SRC_INC_8 | UDMA_DST_INC_NONE | UDMA_ARB_4); } void InitUARTs(void) { // Enable the UART1 peripheral, and configure it to operate even if the CPU is in sleep. ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOC); ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UART1); ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UART1); ROM_GPIOPinConfigure(GPIO_PC4_U1RX); ROM_GPIOPinConfigure(GPIO_PC5_U1TX); ROM_GPIOPinTypeUART(GPIO_PORTC_BASE, GPIO_PIN_4 | GPIO_PIN_5); ROM_UARTConfigSetExpClk(UART1_BASE, ROM_SysCtlClockGet(), 9600, UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE | UART_CONFIG_PAR_NONE); ROM_UARTFIFOLevelSet(UART1_BASE, UART_FIFO_TX2_8, UART_FIFO_RX2_8); ROM_UARTEnable(UART1_BASE); ROM_IntEnable(INT_UART1); ROM_UARTIntEnable(UART1_BASE, UART_INT_RX | UART_INT_RT); } int main(void) { static unsigned long ulPrevSeconds; volatile unsigned long ulLoop; // Enable lazy stacking for interrupt handlers. ROM_FPULazyStackingEnable(); //clock 80M SysCtlClockSet(SYSCTL_SYSDIV_2_5 | SYSCTL_USE_PLL | SYSCTL_OSC_MAIN | SYSCTL_XTAL_16MHZ); ROM_SysCtlPeripheralClockGating(true); // Enable the GPIO port that is used for the on-board LED. ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF); ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_1); ROM_GPIOPinTypeGPIOOutput(GPIO_PORTF_BASE, GPIO_PIN_2); // Configure SysTick to occur 100 times per second, to use as a time // reference. Enable SysTick to generate interrupts. ROM_SysTickPeriodSet(ROM_SysCtlClockGet() / SYSTICKS_PER_SECOND); ROM_SysTickIntEnable(); ROM_SysTickEnable(); // Initialize the CPU usage measurement routine. //CPUUsageInit(ROM_SysCtlClockGet(), SYSTICKS_PER_SECOND, 2); // Enable the uDMA controller at the system level. Enable it to continue // to run while the processor is in sleep. ROM_SysCtlPeripheralEnable(SYSCTL_PERIPH_UDMA); ROM_SysCtlPeripheralSleepEnable(SYSCTL_PERIPH_UDMA); // Enable the uDMA controller error interrupt. This interrupt will occur // if there is a bus error during a transfer. ROM_IntEnable(INT_UDMAERR); // Enable the uDMA controller. ROM_uDMAEnable(); // Point at the control table to use for channel control structures. ROM_uDMAControlBaseSet(ucControlTable); // Initialize the uDMA memory to memory transfers. //InitSWTransfer(); // Initialize the uDMA UART transfers. ROM_IntMasterEnable(); InitUART0(); InitUARTs(); UARTStdioInit(0); UARTprintf("\nStart\n"); // Remember the current SysTick seconds count. ulPrevSeconds = g_ulSeconds; GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0); // Loop until the button is pressed. The processor is put to sleep // in this loop so that CPU utilization can be measured. while(1) { // Check to see if one second has elapsed. If so, the make some updates. if(g_ulSeconds != ulPrevSeconds) { // Turn on the LED as a heartbeat GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); SysCtlDelay(SysCtlClockGet() / 3 /5); // Turn off the LED. GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); SysCtlDelay(SysCtlClockGet() / 3 /5); } // Put the processor to sleep if there is nothing to do. This allows // the CPU usage routine to measure the number of free CPU cycles. // If the processor is sleeping a lot, it can be hard to connect to // the target with the debugger. ROM_SysCtlSleep(); // See if we have run long enough and exit the loop if so. if(g_ulSeconds >= 10) { break; } } // Indicate on the display that the example is stopped. UARTprintf("\nStopped\n"); // Loop forever with the CPU not sleeping, so the debugger can connect. while(1) { GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, GPIO_PIN_1); GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_PIN_2); SysCtlDelay(SysCtlClockGet() / 3 /5); GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_1, 0); GPIOPinWrite(GPIO_PORTF_BASE, GPIO_PIN_2, 0); SysCtlDelay(SysCtlClockGet() / 3 /5); } } 跟電腦人機連接的UART0鮑率是設定115200 其他五個UART的鮑率是19200 五個儀器會同時傳資料進晶片 晶片再傳給人機 我用BCB5寫人機介面 但是如果送進去晶片的資料量大一點 人機介面收到所解出來的資料就會錯很多 除錯除了快一個月了 無法確定是晶片的問題還是BCB5的問題 請問有高手可以指教嗎??? 晶片這樣寫如果五組資料同時傳會不會造成資料錯亂呢? BCB5收資料的部分我是用到六個timer去寫 一個timer專門收集資料 另外五個解五個儀器的資料 大致上是這樣 感激不盡 >< -- ※ 發信站: 批踢踢實業坊(ptt.cc) ◆ From: 140.117.95.119

12/11 05:15, , 1F
用貼code的網頁吧,這樣看太累
12/11 05:15, 1F

12/11 14:56, , 2F
不好意思~我把CODE放到網頁上了-> http://ppt.cc/9DAn
12/11 14:56, 2F

12/12 23:33, , 3F
你的UARTxIntHandler裡面會不會做太多事情了?
12/12 23:33, 3F

12/12 23:33, , 4F
還有while等資料傳完,那資料太多勢必會影響到吧?
12/12 23:33, 4F

01/02 20:28, , 5F
在while裡等資料 小妹是照著範例程式做的說 ><
01/02 20:28, 5F
文章代碼(AID): #1IfmgQ3f (ASM)
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文章代碼(AID): #1IfmgQ3f (ASM)