[問題] verilog燒FPGA板out of range
剛剛寫了一個程式
總之就是用verilog然後連VGA到螢幕畫圖
可是不知道怎麼寫的
我燒到板子後螢幕出來的就是"out of range"這三個字一直跳動
可以請問一下這是什麼問題嗎
順便附上我的vga_control code
module VGA_control(
input clk,
input reset,
output reg[10:0] vcounter,
output reg[11:0] hcounter,
output reg visible,
output reg oHS,
output reg oVS
);
always @ (posedge clk or posedge reset) begin
if(reset) begin
hcounter<=0;
vcounter<=0;
end
else begin
hcounter<=hcounter+1;
if(hcounter==11'd800) begin
hcounter<=0;
vcounter<=vcounter+1;
end
if(vcounter==10'd525) begin
vcounter<=0;
end
end
end
always @ (posedge clk or posedge reset) begin
if(reset) begin
visible<=0;
oHS<=0;
oVS<=0;
end
else begin
if(hcounter>=11'd0 & hcounter<11'd640 & vcounter>=10'd0 &
vcounter<10'd480) begin
visible<=1;
end
else begin
visible<=0;
end
if(hcounter>=11'd656 & hcounter<11'd752) begin
oHS<=0;
end
else begin
oHS<=1;
end
if(vcounter>=10'd490 & vcounter<10'd492) begin
oVS<=0;
end
else begin
oVS<=1;
end
end
end
endmodule
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